Parallel calculation of 3-D parasitic resistance and capacitance with linear boundary elements
نویسندگان
چکیده
1 This work is supported by National Science Foundation 60376019. Abstract--The widespread application of deep sub-micron and multilayer routing techniques makes the interconnection parasitic influence become the main factor to limit the performance of VLSI circuits. Parallel direct boundary element calculation of three-dimensional (3-D) resistance and capacitance is an important method for fast extraction. In this paper, a parallel algorithm to implement linear element calculation by using PVM (Parallel Virtual Machine, a distributed calculating software on PC network) is introduced. The hierarchical calculation scheme of the setup and solution processes of linear equations is discussed. At the end, the performance and workload balance of the algorithm are analyzed.
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